Advanced Development PD Lead

Responsibilities:

• Investigate, plan, and test new physical design methodologies to enable sub-threshold and near-threshold circuits and other related low power techniques (e.g., adaptive body biasing, customized standard cells, specialized memory structures, etc.). 
• Validate and refine new techniques as part of a team that is building complex test chips in advanced nodes (e.g., 12nm and beyond).
• Work with product development teams (Engineering team and Architecture and Product Planning team) to rapidly deploy newly developed techniques in products. 
• Plan and lead physical design activities for test chips owned by the Advanced Development team. As part of this effort, lead a small group of internal and contract resources.
• Maintain a relationship with and collaborate with 3^rd party CAD tool vendors during the development of new methodologies.

Requirements:

• 10 years of experience serving as technical lead or manager for physical design in advanced SoCs.
• A master’s degree in electrical engineering or a related field is required. 
• Experience serving as physical design lead in 16nm and beyond is required.
• Experience building complex SoCs with a mix of processors, memories, and high-speed interfaces is required.
• Experience running advanced timing flows (e.g., SOCV) and power-driven PD flows (e.g., multi-domain designs with a UPF/CPF flow) is required.
• Experience developing new timing flows, custom standard cells, and power-driven PD flows is highly desirable.
• Experience managing a small group of engineers is highly desirable.
• Experience developing new technologies and transitioning those technologies to production is highly desirable.