Physical Design Director

Responsibilities:

• Responsible for GDS delivery of all SoCs that satisfies product requirements and tape out checks with predictable schedule
• Works with appropriate teams (Architecture/RTL/package) in creating floorplan, and finalizes module placement, bump placement and I/O locations
• Scopes PD design effort for all the physical activities (Top level, PnR, STA, EMIR, LEC, DRC, LVS, Power optimization etc.), staffs team appropriately and assigns tasks to team members
• Mentor team members regularly and help them with their deliverables
• Responsible for creating PD sign-off flow, with appropriate documentation. 
• PD flow should be enhanced after every tape out to meet product requirements and aggressive tape out schedules
• Publishes and tracks PD relevant milestones regularly
• Provides regular status updates to management and other stakeholders
• Engages RTL team in generating preliminary timing constraints
• Works with RTL team in resolving all timing violations with design fixes as needed
• Collaborates with Architecture, RTL and DV teams to optimize power
• Works with RTL team to implement Functional ECOs
• Comes up with a tape out plan and provides regular updates to all stakeholders in the final days of tape out

Requirements:

• Bachelor's degree in computer engineering, electrical engineering, electronics, or related.
• 15+ years’ experience and at least 3-5 years in the technical lead role and managed global teams.
• Experience with Cadence Physical EDA tools is preferred.
• Identify critical skills, resource gaps to support all planned projects and work with recruiters to hire top talent
• Hands-on experience with all areas of physical design is required.
• Experience with scripting languages like Perl, Tcl is required.
• Great collaboration, and communication skills.
• Superb analytical and problem-solving abilities.
• Excellent organizational, time management, and recordkeeping skills.