Digital Design Verification Engineer

Responsibilities : <ul><li>The Design Verification Engineer will be responsible for verification of digital designs for CMOS integrated circuits, including systems-on-chip with multiple CPUs, and digital signal processors, dedicated DSP hardware, and other digital logic for automotive radio applications.</li><li>Responsible for verification of block(s) that includes writing tests, assertion, and coverage for a block.</li><li>Create tests and verification environment to achieve verification goals.</li><li>Work closely with Design Verification Team to complete verification.</li><li>Work closely with Design Team and participate in specification/design review meeting and planning.</li><li>Debug failures in simulation to root cause problems.</li><li>Achieve defined code and functional coverage goals.</li></ul> Requirements : <ul><li>Master’s/PhD (or Bachelor of Science with relevant experience) in Electrical/Computer Engineering with experience in verification of chip at both unit and system level.</li><li>2+ years of experience in Design Verification.</li><li>Expertise in System Verilog simulation.</li><li>Experience with C programming required.</li><li>Minimum 2 years experience working with C or UVM based verification.</li><li>Experience with Perl, Python, SQL, and other scripting languages.</li><li>Experience with assertion-based verification.</li><li>Good knowledge of inter-processor communication with shared memory system, interconnect, and MCU peripherals (SPI, I2C, GPIO, RTC, ADC, etc.) is a plus.</li><li>Experience working with standards including ARM AMBA APB, AHB, AXI bus based SOCs is desirable.</li><li>Knowledge of mixed-signal design and behavioral modeling of analog blocks is a plus, or a strong desire to learn.</li><li>Excellent problem-solving skills dealing with complex system level issues related to hardware/software debug.</li><li>Experience developing or working with FPGA emulation platforms desirable.</li></ul>

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Digital Design Verification Engineer

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Digital Design Verification Engineer

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