Technical Director, Advanced Packaging Integration

Director, Advanced Packaging Disruptive Technology

Principal/Senior Engineer, APTD CEM - Advanced Packaging Integration Engineering

Senior Engineer, APTD CEM - Advanced Packaging Die Level Technology Engineering

Responsibilities: <ul><li>Lead cross-functional efforts to develop and enable next-generation 2.xD packaging concepts, architectures, and technologies</li><li>Define, document, and implement end-to-end process flows for panel-level packaging technologies</li><li>Lead material selection, characterization, and compatibility assessments for large form factor substrates</li><li>Partner with customers to define and align process specifications and acceptance criteria</li><li>Collaborate with business units on process development (lithography, etch, thin films, etc.), module co-optimization, and technology transfer to customers</li><li>Contribute to our client equipment product strategy by providing feedback to business unit leaders on process and hardware enhancements required to meet customer roadmaps</li><li>Analyze process data to identify trends, drive optimization, and improve performance</li><li>Conduct root-cause analyses of defects and implement corrective actions to improve yield and reliability</li><li>Within established safety guidelines, design and execute complex engineering experiments; collect and analyze data; and deliver rigorous reports with innovative, practical solutions</li><li>Publish and present technical findings at leading industry conferences and in peer-reviewed journals</li><li>Mentor and guide early-career engineers; provide technical direction and best practices</li></ul> Requirements: <ul><li>Master’s degree with 10 years or PhD degree with 5 years of experience in Electrical Engineering, Materials Science, Chemical Engineering, or related field</li><li>In-depth knowledge and hands-on experience with advanced 2.xD packaging technologies such as fan-out panel-level packaging (FOPLP), (organic) interposer, substrate and wafer-level back-end technologies and related process flows</li><li>Expertise in semiconductor processing and integration, including lithography, dry etch, thin film deposition and materials modification techniques on wafer and/or panel-level</li><li>Strong understanding of process equipment and packaging specific materials, including selection criteria, process interactions and performance trade-offs</li><li>Proficiency in statistical data analysis (e.g. DoE, JMP)</li><li>Knowledge of industry standards and best practices in semiconductor packaging</li><li>Solid understanding of process characterization, metrology, materials &amp; failure analysis</li><li>Working knowledge of reliability requirements and qualification methodologies</li><li>Proven capability to lead multi-functional teams to resolve complex technical problems</li><li>Exceptional written and verbal communication skills</li><li>Develop clear, compelling technical presentations and executive‑level slides to effectively convey complex concepts</li><li>Drive structured technical discussions with customers and suppliers</li><li>Articulate positions, influence decisions, and align technical direction</li><li>Ability to produce high‑quality, technically rigorous written content such as reports, white papers, and publications</li><li>Ability to work effectively across geographies and time zones</li></ul>

Responsibilities: Disruptive Pathfinding &amp; Technology Strategy <ul><li>Define and execute long-range (N+2 and beyond) pathfinding roadmap for advanced packaging, identifying next inflection points in integration, interconnect, materials, and architectures.</li><li>Drive concept incubation and feasibility exploration for disruptive packaging approaches beyond existing platforms (e.g., novel interconnect schemes, heterogeneous integration architectures, advanced substrate innovations).</li><li>Evaluate emerging technology options and guide make/buy/partner decisions to establish differentiated capability ahead of industry adoption cycles.</li><li>Anticipate and define technology inflections aligned to AI, HPC, memory integration, chiplet ecosystems, and future system architectures.</li></ul> Innovation Leadership &amp; Team Building <ul><li>Build, lead, and inspire a world-class pathfinding and innovation team, fostering a culture of bold thinking, experimentation, and calculated risk-taking.</li><li>Instill an innovation-first mindset, encouraging teams to challenge existing assumptions and explore unconventional solutions.</li><li>Establish structured frameworks for idea generation, incubation, rapid prototyping, and down-selection.</li><li>Mentor technical leaders and create a pipeline of innovation talent capable of sustaining long-term differentiation.</li></ul> Customer &amp; Market-Driven Innovation <ul><li>Translate customer roadmaps, system architecture trends, and market inflections into actionable technology development strategies.</li><li>Engage deeply with key customers to identify latent needs and unmet challenges not addressed by current packaging solutions.</li><li>Drive creation of new product concepts and technology platforms that deliver step-function improvements in performance, cost, power, and scalability.</li><li>Position offerings to create clear value differentiation and long-term competitive advantage.</li></ul> Ecosystem Development &amp; Strategic Partnerships <ul><li>Build and lead a collaborative innovation ecosystem across materials suppliers, substrate vendors, OSATs, foundries, equipment partners, and research institutions.</li><li>Identify and activate disruptive partnerships that accelerate innovation cycles and enable early validation of emerging technologies.</li><li>Drive joint development programs and consortia engagement to shape industry direction and standards.</li></ul> Program Leadership &amp; Execution Governance <ul><li>Establish governance models for early-stage technology programs, balancing exploration with execution discipline.</li><li>Drive alignment across engineering, product, and business units to transition pathfinding concepts into development pipelines.</li><li>Develop executive-level narratives and decision frameworks to communicate technology trade-offs, investments, and strategic priorities.</li><li>Ensure learnings from early exploration are captured, scaled, and leveraged across the organization.</li></ul> Leadership Expectations <ul><li>Visionary Technology Leader: Anticipates industry disruption and defines future-state architectures ahead of the market.</li><li>Innovation Catalyst: Creates an environment where breakthrough ideas are generated, tested, and scaled.</li><li>Strategic Connector: Bridges customer roadmaps, internal capabilities, and ecosystem innovations into cohesive strategies.</li><li>Builder of Teams &amp; Culture: Attracts, develops, and retains top talent while fostering collaboration and accountability.</li><li>Decisive Change Agent: Operates effectively in ambiguity, making high-impact decisions with incomplete data.</li></ul> Requirements: <ul><li>15+ years of experience in semiconductor technology, including advanced packaging, front-end processing, or adjacent domains.</li><li>Demonstrated leadership in technology pathfinding, innovation strategy, or early-stage platform development.</li><li>Strong understanding of current advanced packaging technologies (D2W, RDL, CoWoS, TSV, etc), with the ability to think beyond existing paradigms.</li><li>Proven experience building and leading cross-functional or exploratory R&amp;D teams.</li><li>Ability to translate complex technology concepts into business impact and strategic direction.</li></ul>

Responsibilities: <ul><li>Develop and enable advanced package technologies for post-fab wafer finish and assembly processes.</li><li>Improve product quality, yield, productivity, and manufacturing cost.</li><li>Partner with process and product engineering teams to integrate semiconductor technologies.</li><li>Drive yield improvements through package integration innovation, layout optimization, design improvements, and process margin enhancement.</li><li>Collect and analyze data to support design, layout, and integration flow decisions.</li><li>Collaborate with Probe, Yield Analysis, Test, Product Engineering, PWF Engineering, Assembly Engineering, Front-End Wafer Fab, Assembly/Test Engineering, and Global Quality teams.</li><li>Ensure robust quality through process monitoring, inspection, testing, SPC, DOE, and defect analysis.</li><li>Support product transition from development through qualification into High Volume Manufacturing (HVM).</li><li>Provide Process of Record (POR) and Model of Record (MOR) documentation.</li></ul> Requirements: <ul><li>B.S./M.S./Ph.D. (or equivalent) in Electrical, Mechanical, Chemical Engineering, Physics, Materials Science, or related discipline.</li><li>2+ years of semiconductor process integration experience, preferably in advanced packaging, post-fab wafer finishing, or assembly processes.</li><li>Proficiency in Python, R, and SQL.</li><li>Experience with Visual Basic.</li><li>Knowledge of E3, FDC, and RMS (Recipe Management System).</li><li>Strong statistical analysis, process modeling, SPC, DOE, defect analysis, and dashboarding skills.</li><li>Strong understanding of semiconductor process flows and integration.</li><li>Strong root-cause analysis and complex problem-solving capability.</li><li>Ability to work under tight timelines and limited resources.</li></ul>

Responsibilities: <ul><li>Develop and optimize assembly processes for advanced packaging technologies, including wafer-level packaging, Chip-on-Wafer (CoW), and Chip-to-Wafer (C2W) die stacking.</li><li>Improve product quality, yield, productivity, and manufacturing cost.</li><li>Drive process management projects supporting future technology nodes.</li><li>Evaluate, qualify, and implement new equipment and materials.</li><li>Establish process parameters for semiconductor manufacturing equipment.</li><li>Ensure robust quality through process monitoring, inspection, testing, SPC, DOE, and defect analysis.</li><li>Use data analytics to establish advanced process controls and identify improvement opportunities.</li><li>Collaborate with Package Integration, Assembly Engineering, Front-End Wafer Fab, Assembly/Test Engineering, Product Engineering, and Global Quality teams.</li><li>Support seamless transition from product development through qualification into High Volume Manufacturing (HVM).</li><li>Provide Process of Record (POR) and Model of Record (MOR) documentation.</li></ul> Requirements: <ul><li>B.S./M.S./Ph.D. (or equivalent) in Materials Science, Chemical Engineering, Electrical Engineering, Mechanical Engineering, Physics, or related technical discipline.</li><li>2+ years of semiconductor process development or equipment evaluation experience, preferably in wafer bonding, die stacking, or advanced packaging.</li><li>Proficiency in Python, R, and SQL.</li><li>Experience with Visual Basic for automation and tool integration.</li><li>Knowledge of E3, FDC (Fault Detection and Classification), and RMS (Recipe Management System).</li><li>Strong data analytics capability supporting SPC, DOE, defect analysis, and dashboards.</li><li>Strong understanding of semiconductor process flows, yield, performance, and reliability.</li><li>Strong problem-solving and root-cause analysis skills.</li><li>Ability to work effectively under aggressive timelines and limited resources.</li></ul>

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4 microbump finepitch interconnects Jobs found

Technical Director, Advanced Packaging Integration

Director, Advanced Packaging Disruptive Technology

Principal/Senior Engineer, APTD CEM - Advanced Packaging Integration Engineering

Senior Engineer, APTD CEM - Advanced Packaging Die Level Technology Engineering

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4 microbump finepitch interconnects Jobs found

Technical Director, Advanced Packaging Integration

Director, Advanced Packaging Disruptive Technology

Principal/Senior Engineer, APTD CEM - Advanced Packaging Integration Engineering

Senior Engineer, APTD CEM - Advanced Packaging Die Level Technology Engineering

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