Senior Engineer, Global Facilities Central Engineering, Construction - Mechanical

Manager - Training

Principal/Staff Engineer – Firmware Development

Principal NAND Reliability Product Engineer

Staff/Principal Engineer - CMP Advanced NAND

Fronted End Central Process Integration Senior Engineer

Front End Central Product Integration (FE CPIE) MTS (FE)

MTS – FECOS CPIE Device

Receptionist

Customer Process Engineer(Mandarin Speaker)

Responsibilities: <ul><li>Build effective collaboration across facilities, procurement, manufacturing, IT, and operations teams</li><li>Communicate project updates, risks, and key milestones to stakeholders and leadership</li><li>Identify risks, escalate issues proactively, and recommend mitigation strategies</li><li>Support root cause analysis and technical problem-solving across global sites</li><li>Contribute to development and standardization of Best Known Methods (BKMs)</li><li>Drive alignment of engineering priorities with global facilities strategies</li><li>Lead or support capacity planning and scenario analysis across site networks</li><li>Support sustainability initiatives aligned with corporate goals</li><li>Lead construction engineering activities for semiconductor facilities across design, construction, commissioning, and operations phases</li><li>Provide technical engineering support to construction teams to drive project execution and operational excellence</li><li>Manage scope, schedule, cost, and quality to meet project and business requirements</li><li>Support large-scale greenfield fab projects across U.S. and Asia, ensuring compliance with standards and regulatory requirements</li><li>Review engineering design packages and provide timely, documented feedback</li><li>Monitor construction progress and resolve technical issues during project execution</li><li>Support cost estimation, scheduling, and business case development</li><li>Coordinate with internal teams and external consultants to ensure alignment with project goals</li><li>Drive continuous improvement in construction practices with a focus on efficiency, innovation, and sustainability</li></ul> AI Responsibilities: <ul><li>Integrate AI-assisted tools into engineering and project workflows to enhance efficiency, quality, and decision-making</li><li>Identify opportunities to apply AI-driven insights in construction engineering, data analysis, and project planning</li><li>Contribute to continuous improvement by sharing AI-enabled best practices within the team</li></ul> Requirements: <ul><li>Minimum Required Qualifications / Experience</li><li>Bachelors degree in Mechanical Engineering, Construction, Building Services, or related field.</li><li>Minimum 8 years of mechanical engineering experience, including 5 years supporting construction projects.</li><li>Strong semiconductor facilities and process systems design experience (Cleanroom HVAC, CHW, PCW, Exhaust, CDA, Vacuum, etc.).</li><li>Experience working in EPCM project environments.</li><li>Ability to review engineering drawings, specifications, and technical designs.</li><li>Experience in project execution, including cost control, scheduling, commissioning, and handover.</li><li>Strong knowledge of construction engineering practices within semiconductor or similar industries.</li><li>Excellent technical problem-solving and root-cause analysis skills.</li><li>Strong communication, stakeholder management, and cross-functional leadership abilities.</li><li>Ability to work effectively in a global, multicultural environment.</li><li>Ability to apply baseline digital fluency and AI literacy to utilize AI-enabled tools for engineering analysis, problem-solving, and operational efficiency</li><li>Highly Desirable / Preferred Skills or Experience</li><li>Professional certification or membership in a recognized engineering body</li><li>Experience working on semiconductor fab or large industrial projects</li><li>Experience in greenfield construction projects</li><li>Knowledge of sustainability practices in construction and facilities</li><li>Experience working across global or regional teams</li></ul>

Responsibilities: <ul><li>The job holder will be responsible to design, develop, deliver and administer training programs that enhance employee knowledge, skills, behaviours, and performance to support the company attain its strategic objectives.</li><li>Develop and implement comprehensive Training intervention programs that aligns with Talent Management strategy and overall development of the employees to address specific skill gaps.</li><li>Conduct needs assessment to identify skill gaps and training needs and create training programs that are designed to effectively improve performance and productivity of employees.</li><li>Plan the annual training calendar and delivery of Internal/ External trainings and development programs by rolling out suitable training programs that enhance employees’ skills and performance, increase productivity/ quality of work and meet the identified needs in alignment with the organizations values and culture.</li><li>Facilitate training and awareness sessions/ workshops for employees and leaders and maintain close communication with all to discuss training needs, training methodologies and solutions to ensure that they are fully aware of training opportunities available.</li><li>Deliver training sessions, workshops, and seminars to employees, ensuring content is engaging, relevant, and interactive.</li><li>Develop and manage the training budget to ensure that the best quality of trainings are provided within the established budget and ensure that resources are allocated effectively across all levels of the organization.</li><li>Identify and partner with external vendors to source training content and solutions as needed and measure performance to ensure that the organizations learning and development programs have access to the best training content and solutions available in the market.</li><li>Provide coaching and support to managers and leaders to help them develop their teams and support employee development.</li><li>Conduct post-training surveys to measure training program and vendor effectiveness and relevancy along with individual retention and adoption of learnings.</li></ul> Requirements: <ul><li>Bachelor’s degree in Business Administration with Major’s in Human Resources; Master’s degree- preferred</li><li>Professional certification in Assessment and Learning and/or CIPD in Learning and Development (level 3 or 5)- preferred</li><li>Certified Coach or Certified NLP (Neuro-Linguistic Programming) practitioner - preferred</li></ul>

Responsibilities: SUPPORT CUSTOMERS AND DEBUG FIRMWARE <ul><li>Customer engineering support: Act as the primary technical escalation point for Security Firmware on SSD products — triage, prioritize, and drive customer reported security issues to closure within committed response times</li><li>Security feature enablement: Guide customers through the configuration, integration, and validation of SSD security features; including, but not limited to: TCG Opal/Pyrite/Ruby and Enterprise SSC, ATA and NVMe security commands, self-encrypting drive operation, secure boot and signed firmware update, sanitize and cryptographic erase, key management, and device attestation</li><li>Debug and root cause analysis: Reproduce customer, qualification, and field failures in the lab; analyze firmware logs, traces, and bus captures; debug Security Firmware source; and deliver documented root cause and corrective action</li><li>Firmware fixes and validation: Develop, unit test, and functionally validate targeted Security Firmware changes and customer specific configurations and builds, ensuring each change meets the security, functional, performance, and quality/reliability requirements of the technical spec matrix before release</li><li>Vulnerability and incident response: Assess the impact of reported vulnerabilities and security findings on products already in the field, and support mitigation planning, remediation delivery, and customer disclosure</li><li>Customer qualification and compliance support: Support customer security audits, security questionnaires, and certification activities (e.g. TCG specification compliance, FIPS 140-3, Common Criteria), and produce the application notes, integration guides, and technical documentation customers depend on</li></ul> STAKEHOLDER MANAGEMENT <ul><li>Represent our client in direct technical engagement with customer engineering teams, translating Security Firmware behavior, constraints, and risk into terms that are clear to both engineering and non-engineering audiences</li><li>Dedicatedly provide to management, multi-functional team members, and the firmware team consistent, detailed, and properly summarized information regarding customer issues, escalation status, and the progress of firmware fixes</li><li>Maintain accurate issue records, root cause reports, and knowledge base content so that recurring customer questions are answered faster over time</li></ul> PEOPLE DEVELOPMENT <ul><li>Multi-functional Teamwork: Develop and maintain collaborative, open and, constructive relationships with peers, management, and partner teams across firmware development, product engineering, quality, and field applications</li><li>Team Development: Provide technical capability that continuously improves team involvement, morale, and productivity</li><li>Personal Development: Work to continuously improve your technical capability and communication skills</li></ul> AI UTILIZATION <ul><li>Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and requirements.</li><li>Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work.</li></ul> Requirements: <ul><li>Bachelors/masters degree in computer or electrical engineering with 5+ years of relevant experience.</li><li>Experience in a customer facing engineering role such as customer engineering support, field applications, sustaining engineering, or escalation management is strongly preferred</li><li>Embedded Security domain knowledge and experience, including cryptography fundamentals (AES, RSA/ECC, SHA), key management, secure boot, and secure firmware update</li><li>Familiarity with storage security standards and features such as TCG Opal and Enterprise SSC, ATA Security, NVMe security and sanitize commands, and self-encrypting drives is an advantage</li><li>Expertise in the use of programming languages (eg. C, C++, RUST), programming tools &amp; environments</li><li>Experience programming in Python for test automation, log parsing, and debug tooling is an advantage</li><li>Understanding of storage interfaces including ideally PCIe/NVMe, SATA, or SAS</li><li>Experience with NAND flash and other non-volatile storage is an advantage</li><li>Experience in storage industry, storage systems, or a related technology is an advantage</li><li>Proficiency in debugging and resolving code problems for firmware applications, including the use of debuggers, firmware trace and log analysis, and protocol analyzers</li><li>Experience with defect tracking, change control, and firmware release processes in a production or sustaining environment</li><li>Excellent written and verbal communication skills, with the ability to manage multiple concurrent escalations under time pressure and stay effective in customer visible situations</li><li>Ability to apply baseline digital fluency and role-appropriate AI literacy to use AI-enabled tools responsibly and effectively for research, analysis, content creation, problem-solving, operational tasks, and achieving business outcomes.</li></ul>

Responsibilities: <ul><li>Define and implement NAND Flash reliability test flows to assess product reliability performance and prevent extrinsic/intrinsic reliability escapes.</li><li>Perform high volume statistical data analysis to evaluate NAND DPM/ intrinsic reliability risks and trends.</li><li>Drive electrical failure analysis, including advance characterization, to identify root causes and solution spaces.</li><li>Develop short term countermeasures such as targeted stresses and screens, applying knowledge of digital/analog circuits, device physics, and process engineering.</li><li>Qualify the product with innovative control measures to provide best in Class DPM and Cell reliability.</li><li>Collaborate closely with Fab, NAND Technology, NAND Design, Product Development, System Development, and Quality/Reliability teams to develop solutions and enable shipment of high quality end products.</li></ul> Requirements: <ul><li>Bachelor’s degree&nbsp;with &gt; 10 years or Master’s degree&nbsp;with &gt; 7 years or PhD with &gt; 5 years&nbsp;of relevant experience in Electrical Engineering or related field.</li><li>Experience in Semiconductor Reliability, NAND Technology, and Electrical Failure Analysis.</li><li>In depth background in NAND Design, Device Physics, Circuits,&nbsp;Process, Test, Validation.&nbsp;</li><li>Experience with application of AI tools, LLMs ,&nbsp;data analysis tools (e.g., Python, JMP, Tableau)</li><li>Strong statistical analysis, communication, and problem solving skills.</li><li>Experience in leading cross functional projects and mentoring&nbsp;junior engineers.</li><li>Strong analytical and problem solving skills.</li><li>Team player and self driver.</li></ul>

Responsibilities: <ul><li>As a CMP Process Development Engineer, you will develop and optimize chemical mechanical planarization procedures. These procedures aim to improve product quality and reliability for the next generation of company memory parts.</li><li>Focus on understanding and improving the process margins required for meeting the mature yield goal for 3D NAND parts</li><li>Advanced 3D NAND CMP process development will include performing fundamental research, consumables development, and hardware evaluation, as well as testing processes for novel applications</li><li>Initiate and manage experiments to widen process margins as well as to evaluate manufacturability of next node solutions</li><li>Extensively collaborate with vendors to develop processes that meet integration requirements for current and next-generation 3-D NAND nodes</li><li>Incorporate best known manufacturing methods into early development phase of upcoming nodes</li><li>Design and implement advanced process monitoring and control methodologies</li><li>Provide strategic roadmap for N+, N++ and future NAND Nodes</li><li>Serve as a technical expert within company contributing to technical projects for improvements to processes, procedures, and equipment</li><li>Define and leads complex, multi-functional projects of critical importance to company, helps to define strategic direction</li><li>Provide advice and counsel to management on significant technical issues. Leads and initiate innovation projects through patents/technical papers</li><li>This position requires communication and collaboration with partners both locally and globally. Strict adherence to company Intellectual Property Protection policy is necessary</li></ul> Requirements: <ul><li>PhD with ≥5 years, or Master’s degree with ≥7 years, or Bachelor’s degree with ≥10 years of relevant experience in Electrical Engineering, Materials Science, Chemical Engineering, Physics, or a related field, with demonstrated expertise in semiconductor Experience in Chemical Mechanical Planarization (CMP) Process in 300mm wafer fabrication.</li><li>Hands-on experience CMP equipment operation such as AMAT (LKP), EBARA-300X and next generation CMP equipment, optical metrology, profilometry, polishing slurries, conditioners, and polishing pads</li><li>Experience in dielectrics/metals CMP process development on 3D NAND or other memory technology</li><li>Understanding of various integration and structural impacts and constraints related to film deposition and other upstream/downstream processes</li><li>An understanding of the general process steps and process flow for memory processing planar and vertical NAND memory.</li><li>Strong interest in Data science, modelling, and drive to use/adopt AI to optimize workflows.</li><li>Excellent oral and written communication skills with ability to convey the message in concise and effective manner both in local as well as remote communications.</li><li>Strong collaboration and communication skills (verbal and written).</li><li>Self-driven, adaptable, and able to manage multiple projects.&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</li><li>Proven ability to take calculated risks and execute novel solutions.</li><li>Recognized as a mentor, team player and technical expert with the ability to solicit feedback, accept input, and analyze success/failure.</li></ul>

Responsibilities: <ul><li>Collaborate with multi-functional network teams from PIE, Process &amp; Equipment Engineering, WLR, TD to improve product yields and reliability within your assigned process loop.</li><li>May require travel to global company sites to foster collaboration and drive execution.</li><li>Communicate module related issues to the Fab engineering and leadership teams.</li><li>Design, execute, and analyze experiments to improve fab process, yield, and quality.</li><li>Collect and interpret complex data to optimize Fab processes and increase yields.</li><li>Engage and/or lead cross-area engineering teams to tackle process issues.</li><li>Work closely with global partners to stay ahead of on module related topics and process alignment projects.</li><li>Collaborate with other PI module owners and sister fabs to drive business process alignment</li><li>Partner with IE, Process and Equipment Engineering and Production to better forecast and balance yield, output and process issues</li><li>Promote network synergy through improved benchmarking and standardization of known engineering best-known methods (BKMs), business process.</li></ul> Requirements: <ul><li>Bachelor’s or advanced degree in Engineering or Science is required</li><li>Strong analytical, logical, and critical thinking skills</li><li>Effective communicator, able to collaborate across all levels</li><li>Growth mindset with a passion for continuous learning</li><li>Internship or experience in the semiconductor industry is a plus</li><li>Demonstrated leadership and a track record of impact are highly desirable</li><li>Interest in and knowledge of the semiconductor industry and company is preferred.</li></ul>

Responsibilities: <ul><li>Lead process integration (PI) structural uniformity and cross loop integration for critical modules (e.g., capacitance loop), owning end to end integration strategies to resolve yield, quality, and reliability gaps. </li><li>Drive physics&nbsp;and process based integration solutions through close collaboration with cross module process owners, PI subject matter experts, and key suppliers to optimise integration structures and achieve BIC yield and quality targets.</li><li>Develop and apply model based root cause analysis frameworks (transport, reaction kinetics, pattern density, and geometry dependent effects) to diagnose structural non uniformity. Define, implement, and continuously strengthen critical inline monitoring and defence lines (CD, film loss, mass delta, defectivity, edge/periphery metrics) to ensure robust control of structural uniformity.</li><li>Own and advance product integration programs and loop level domain expertise, maintaining deep technical knowledge across node transitions. </li><li>Proactively drive node over node “shift left” integration, including early implementation of uniformity, bevel, and backside best known methods (BKMs) during development phases to accelerate whole wafer (centre-to-edge) yield and quality ramp.</li><li>Drive worldwide technical alignment and execution excellence by leading global projects, standardizing and leveraging network BKMs, and scaling proven solutions across sites. Identify efficiency and performance gaps, and lead business process creation, optimization, and re engineering to improve benchmark performance, cycle time, and development productivity.</li><li>Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements.</li></ul> Requirements: <ul><li>Bachelors/Masters/PhD. in EE, Materials Engineering, Materials Science, Physics and Chemical but optional if candidates have more than 10 years experience in process related role in the semiconductor industry.</li><li>With more than 7 years of relevant industry experience/knowledges.</li><li>Good logical thinking and knowledge in Semiconductor Fabrication process flows, interaction of different processes and how changes affect yield, device performance and reliability. Understanding of DRAM and NAND operation and structure to decipher parametric, probe and qual data from both front-end and backend assembly processes.</li><li>Good model-based problem solving, together with data-driven decision making, and presentation skills. Proven ability to troubleshoot and solve structure and device-related issues, and address root cause.</li><li>Good organizational capabilities and ability to work effectively. Ability to be flexible with job responsibilities and take the initiative to assume added responsibilities. Travel to company sites as necessary for face-to-face collaboration.</li><li>Strong interpersonal skills and customer/co-worker relationships. Successfully demonstrated teamwork skills with a strong focus on developing good team dynamics.</li><li>Good multi-tasking, verbal and written communication skills.</li><li>Ability to apply baseline digital fluency and role appropriate AI literacy to use AI enabled tools responsibly and effectively for research, analysis, content creation, problem solving, operational tasks, and achieving business outcomes</li></ul>

Responsibilities: <ul><li>Enable technology ramp in high-volume production for CMOS and memory devices.</li><li>Improve device performance with a focus on variability reduction and robustness.</li><li>Support and execute design and test optimization to enhance manufacturability and performance.</li><li>Identify and implement process simplification and working methodology improvements.</li><li>Lead or actively contribute to cross-functional problem-solving for device, yield, and quality issues.</li></ul> Requirements: <ul><li>Minimum 5 years of relevant working experience is requiredA masters or Ph.Ddegree in Physics or Engineering areas is preferred.</li><li>Working experience in wafer fab process or process integration engineeringDirect experience in advanced CMOS device technology such as FinFET or GAA is preferable.</li><li>Proven knowledge in semiconductor physics and understanding of transistor operations, scaling limitations and reliability, basic knowledge of CMOS circuits and characterisation methods.</li><li>Understanding of wafer fabrication process areas, including tool sets, process mechanisms, tuning knobs, etc.</li><li>Excellent data analysis skills using software (JMP, SPOTFIRE, etc).</li><li>Strong task ownership, self-motivated to work with other team members to make progress collaboratively.</li><li>Open-minded attitude to learn new skills and could adapt to a new working environment swiftly.</li><li>Good digital literacy with MS OfficeProgramming capability such as Python is a plus.</li><li>Occasional international business travel is required for this position.</li></ul>

﻿Responsibilities: <ul><li>Welcome and professionally engage guests upon arrival.</li><li>Complete check-in and check-out procedures accurately and efficiently.</li><li>Provide personalized service to luxury, VIP, and international guests.</li><li>Manage guest requests, questions, complaints, and service-recovery situations.</li><li>Handle reservations, room allocations, billing, and guest profiles accurately.</li><li>Coordinate with Housekeeping, Concierge, Bell Desk, Reservations, Guest Relations, and other hotel departments.</li><li>Maintain accurate records in the property-management system.</li><li>Communicate hotel facilities, services, policies, and local information clearly.</li><li>Identify opportunities to enhance the guest experience and promote hotel services.</li><li>Handle confidential guest information professionally and discreetly.</li><li>Support smooth front-office operations during busy periods.</li><li>Follow Jumeirah’s grooming, appearance, safety, and service standards.</li><li>Demonstrate cultural awareness when assisting guests from different countries and backgrounds.</li></ul> Requirements: <ul><li>Previous experience as a Receptionist, Front Desk Agent, Guest Service Agent, Guest Relations Agent, or similar front-office professional.</li><li>Experience in a luxury or ultra-luxury hotel, resort, branded residence, or comparable high-end hospitality environment.</li><li>Strong exposure to guest service, VIP service, and international clientele.</li><li>Excellent spoken and written English communication skills.</li><li>One additional language at C1 level.</li><li>Preferred additional languages include Russian, Spanish, French, Italian, German, Dutch, Greek, Portuguese, Mandarin/Chinese, and Japanese.</li><li>Excellent grooming and professional presentation.</li><li>Strong interpersonal, communication, and problem-solving skills.</li><li>Ability to work in a fast-paced, multicultural, guest-facing environment.</li><li>Availability to work shifts, weekends, and public holidays.</li><li>A clear, professional photograph must be included on the CV.</li><li>Candidates must be eligible to work in the UAE or be willing to relocate.</li></ul>

Responsibilities: <ul><li>Good communicator, able to explain technical concepts to both technical and non-technical audiences and collaborate effectively with global internal teams and customers.&nbsp;</li><li>Establish key customer care abouts and contributes &amp; reviews the product requirements.</li><li>Conducts joint design reviews between company and customers during product development cycles to ensure product specifications are properly defined (Design Objectives).&nbsp;</li><li>Work with local FAE and product engineering teams on new concepts.</li><li>Develop expertise in how company products are applied based on Customer’s manufacturing processes. Translates customer’s assembly process to company product design teams, assisting with crafting company Application Spec documents. Collaborates early and aligns with customers on companys final Application Spec. Conducts signoff review between company and Customer for NPI products.</li><li>Works with company engineering to integrate customer application parameters into product and application specifications.</li><li>Creates application notes, training materials, or documentation to help customers understand how to use company products. Provides product application training.</li><li>Provides internal training to company product and FAE groups showing new process technologies that our customer base is utilizing or experimenting with for future development.</li><li>Assists customers with Test methodologies to test company products. Ensures company test methodologies are consistent with Customer’s requirements.</li><li>Provides onsite support during multiple NPI stages.&nbsp;</li><li>Ensured feedback is provided to design engineers.</li><li>Must understand the SMT processes, pick and place equipment, robotics, cable routing and general PCB processes and procedures.</li><li>Assess/collaborate with customer manufacturing teams during product design phase.</li><li>Troubleshoot technical issues that customers encounter with company products during trials and production.</li></ul> Requirements: <ul><li>BS or MS in Mechanical Engineering required, 6-10 years of experience – design/field.&nbsp;&nbsp;</li><li>Fluent in Mandarin, English will be an added advantage.&nbsp;</li><li>Experience with design reviews, tolerance analysis and root cause problem-solving.</li><li>Experience in PPAP and production startup.&nbsp;</li><li>Ability to assist the Quality group in understanding potential areas of concern and the ability to relay data back to the product design teams.</li><li>Knowledge of regulatory and compliance standards is related to interconnect.</li><li>Proficiency in Creo, Ansys, and test lab equipment.</li><li>Must be able to travel within South Asia mostly.</li></ul>

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283 professional engineering Jobs found

Senior Engineer, Global Facilities Central Engineering, Construction - Mechanical

Manager - Training

Principal/Staff Engineer – Firmware Development

Principal NAND Reliability Product Engineer

Staff/Principal Engineer - CMP Advanced NAND

Fronted End Central Process Integration Senior Engineer

Front End Central Product Integration (FE CPIE) MTS (FE)

MTS – FECOS CPIE Device

Receptionist

Customer Process Engineer(Mandarin Speaker)

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283 professional engineering Jobs found

Senior Engineer, Global Facilities Central Engineering, Construction - Mechanical

Manager - Training

Principal/Staff Engineer – Firmware Development

Principal NAND Reliability Product Engineer

Staff/Principal Engineer - CMP Advanced NAND

Fronted End Central Process Integration Senior Engineer

Front End Central Product Integration (FE CPIE) MTS (FE)

MTS – FECOS CPIE Device

Receptionist

Customer Process Engineer(Mandarin Speaker)

WhiteCrow WhiteCrow is on a mission to connect companies with the best talent across the globe.

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WhiteCrow is on a mission to connect companies with the best talent across the globe.