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advanced semiconductor packaging
python
visual basic
advanced packaging integration
micro-bump & fine-pitch interconnects
process integration
thermal management
wafer fab
3d quantum integration
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Location
singapore, singapore
batangas, philippines
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Jobtitle
principal/senior engineer, aptd cem - advanced packaging integration engineering
principal/staff/senior engineer, aptd cem - advanced packaging wafer level technology engineering
senior engineer, aptd cem - advanced packaging die level technology engineering
engineer, staff/manager (wet etch / electroplating)
mfg & process dvl engineer 2
operations manager
principal engineer/mts - member of technical staff, hig-hbm product system engineering (media health
process engineering manager (electroplating)
senior process engineer, dry etch
senior quantum 3d integration and packaging engineer
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16 wafer dicing die singulation Jobs found
1-10 of 16
T
Thermal ManagementAdvanced Packaging IntegrationPackage ArchitectureAdvanced InterconnectsHeterogeneous IntegrationProcess Integration
P
Process Engineering Manager (Electroplating)
11 days ago
P
Electroplating Process EngineeringElectrochemical EngineeringElectroplating EquipmentMetrology & CharacterizationReliability Engineering
S
Technical Documentation3D Quantum IntegrationCryogenic PackagingAdvanced PackagingThermal ManagementMechanical Design
M
MFG & Process DVL Engineer 2
12 days ago
M
Manufacturing Process DevelopmentProcess Design & OptimizationNew Product IntroductionContinuous ImprovementTime Study & Process Capacity Analysis
S
Senior Process Engineer, Dry Etch
2 months ago
S
Wafer ProcessEquipment MaintenanceHigh Volume ProductionStatistical SoftwareStrong Technical CompetencyPlasma AshingWafer Process Engineering
P
Advanced Semiconductor PackagingPackaging Materials & Process DevelopmentSemiconductor Process EngineeringWafer Bonding & DebondingInterposer Technology
Advanced Packaging IntegrationAdvanced Semiconductor PackagingWafer Bonding & Hybrid BondingMicro-Bump & Fine-Pitch InterconnectsRedistribution Layer
Advanced Semiconductor PackagingMicro-Bump & Fine-Pitch InterconnectsWafer Dicing & Die SingulationHybrid BondingUnderfill & Encapsulation Technologies
P
Test Coverage OptimizationDRAM Device Fundamentals and PhysicsHigh Bandwidth Memory (HBM) ArchitectureReliability CharacterizationReliability Risk AssessmentDefectivity Analysis
DOEAdvanced PackagingWafer FabVisual BasicPython
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